FTM2CLKSEL=0, FTM1CLKSEL=0, FTM0TRG1SRC=0, FTM0CLKSEL=0, FTM3CLKSEL=0, FTM2CH0SRC=00, FTM0FLT0=0, FTM0FLT2=0, FTM2FLT0=0, FTM3FLT0=0, FTM1CH0SRC=00, FTM0FLT1=0, FTM0TRG0SRC=0, FTM1FLT0=0
System Options Register 4
| FTM0FLT0 | FTM0 Fault 0 Select 0 (0): FTM0_FLT0 pin 1 (1): CMP0 out |
| FTM0FLT1 | FTM0 Fault 1 Select 0 (0): FTM0_FLT1 pin 1 (1): CMP1 out |
| FTM0FLT2 | FTM0 Fault 2 Select 0 (0): FTM0_FLT2 pin 1 (1): CMP2 out |
| FTM1FLT0 | FTM1 Fault 0 Select 0 (0): FTM1_FLT0 pin 1 (1): CMP0 out |
| FTM2FLT0 | FTM2 Fault 0 Select 0 (0): FTM2_FLT0 pin 1 (1): CMP0 out |
| FTM3FLT0 | FTM3 Fault 0 Select 0 (0): FTM3_FLT0 pin 1 (1): CMP0 out |
| FTM1CH0SRC | FTM1 channel 0 input capture source select 0 (00): FTM1_CH0 signal 1 (01): CMP0 output 2 (10): CMP1 output 3 (11): USB start of frame pulse |
| FTM2CH0SRC | FTM2 channel 0 input capture source select 0 (00): FTM2_CH0 signal 1 (01): CMP0 output 2 (10): CMP1 output |
| FTM0CLKSEL | FlexTimer 0 External Clock Pin Select 0 (0): FTM_CLK0 pin 1 (1): FTM_CLK1 pin |
| FTM1CLKSEL | FTM1 External Clock Pin Select 0 (0): FTM_CLK0 pin 1 (1): FTM_CLK1 pin |
| FTM2CLKSEL | FlexTimer 2 External Clock Pin Select 0 (0): FTM2 external clock driven by FTM_CLK0 pin. 1 (1): FTM2 external clock driven by FTM_CLK1 pin. |
| FTM3CLKSEL | FlexTimer 3 External Clock Pin Select 0 (0): FTM3 external clock driven by FTM_CLK0 pin. 1 (1): FTM3 external clock driven by FTM_CLK1 pin. |
| FTM0TRG0SRC | FlexTimer 0 Hardware Trigger 0 Source Select 0 (0): HSCMP0 output drives FTM0 hardware trigger 0 1 (1): FTM1 channel match drives FTM0 hardware trigger 0 |
| FTM0TRG1SRC | FlexTimer 0 Hardware Trigger 1 Source Select 0 (0): PDB output trigger 1 drives FTM0 hardware trigger 1 1 (1): FTM2 channel match drives FTM0 hardware trigger 1 |
| FTM3TRG0SRC | FlexTimer 3 Hardware Trigger 0 Source Select 1 (1): FTM1 channel match drives FTM3 hardware trigger 0 |
| FTM3TRG1SRC | FlexTimer 3 Hardware Trigger 1 Source Select 1 (1): FTM2 channel match drives FTM3 hardware trigger 1 |